Digital electronic systems such as computer systems often use a common interconnect to share information between components of the digital electronic system. For computer systems, the interconnect is typically the computer bus.
One type of system interconnect is described by IEEE Standards document P1394, Draft 7.1v1, entitled IEEE Standard for a High Performance Serial Bus (hereafter the “P1394 serial bus standard”). A typical serial bus having the P1394 standard architecture is comprised of a multiplicity of nodes that are interconnected via point-to-point links such as cables that each connect a single node of the serial bus to another node of the serial bus. Data packets are propagated throughout the serial bus using a number of point-to-point transactions, wherein a node that receives a packet from another node via a first point-to-point link retransmits the received packet via other point-to-point links. A tree network configuration and associated packet handling protocol ensures that each node receives every packet once.
The P1394 serial bus standard provides for an arbitrary bus topology wherein the hierarchical relationship between nodes of the serial bus is determined by the manner in which the nodes are connected to one another. A P1394 serial bus is configured in three phases: bus initialization, tree identification, and self identification. During bus initialization, the general topology information of the serial bus is identified according to a tree metaphor. For example, each node is identified as being either a “branch” having more than one directly connected neighbor node or a “leaf” having only one neighbor node. During tree identification, hierarchical relationships are established between the nodes. For example, one node is designated a “root” node, and the hierarchy of the remaining nodes is established with respect to the relative nearness of a node to the root node. Given two nodes that are connected to one another, the node connected closer to the root is the “parent” node, and the node connected farther from the root is the “child.” Nodes connected to the root are children of the root. During self identification, each node is assigned a bus address and a topology map may be built for the serial bus.
According to the P1394 serial bus standard, reconfiguration of a serial bus is required when either 1) a new node is joined to the serial bus, or 2) an identified node of the serial bus is removed from the serial bus. Reconfiguration is required to better ensure that all nodes of the serial bus are notified of the newly connected or disconnected node and that each node has a unique bus address. Typically, the node of the serial bus that detects a new connection or disconnection forces the three phase configuration to be performed by asserting a bus reset signal. The three phase configuration process typically requires several hundred microseconds to perform, during which time communications of data between nodes is halted. Such long periods of interruption may significantly affect the operation of the system for some uses of the serial bus. Therefore, it would be desirable to provide a mechanism that allows the connection and disconnection of nodes from the serial bus such that interruptions to serial bus traffic are reduced.